xpci3xxx  1.00.00
xpci3xxx.h
1 
107 #ifndef __xpci3xxx_H__
108 #define __xpci3xxx_H__
109 
110 
111 #include <apci.h>
112 
113 //GENERAL DEFINE
114 
116 #define xpci3xxx_BOARD_NAME "xpci3xxx"
117 
119 #define xpci3xxx_BOARD_VENDOR_ID 0x15B8
120 
122 #define xpci3002_16_BOARD_DEVICE_ID 0x3002
123 
125 #define xpci3002_8_BOARD_DEVICE_ID 0x3003
126 
128 #define xpci3002_4_BOARD_DEVICE_ID 0x3004
129 
131 #define xpci3003_BOARD_DEVICE_ID 0x300b
132 
134 #define xpci3000_16_BOARD_DEVICE_ID 0x3010
135 
137 #define xpci3000_8_BOARD_DEVICE_ID 0x3011
138 
140 #define xpci3000_4_BOARD_DEVICE_ID 0x3012
141 
143 #define xpci3006_16_BOARD_DEVICE_ID 0x3013
144 
146 #define xpci3006_8_BOARD_DEVICE_ID 0x3014
147 
149 #define xpci3006_4_BOARD_DEVICE_ID 0x3015
150 
152 #define xpci3010_16_BOARD_DEVICE_ID 0x3016
153 
155 #define xpci3010_8_BOARD_DEVICE_ID 0x3017
156 
158 #define xpci3010_4_BOARD_DEVICE_ID 0x3018
159 
161 #define xpci3016_16_BOARD_DEVICE_ID 0x3019
162 
164 #define xpci3016_8_BOARD_DEVICE_ID 0x301a
165 
167 #define xpci3016_4_BOARD_DEVICE_ID 0x301b
168 
170 #define xpci3100_16_BOARD_DEVICE_ID 0x301c
171 
173 #define xpci3100_8_BOARD_DEVICE_ID 0x301d
174 
176 #define xpci3106_16_BOARD_DEVICE_ID 0x301e
178 #define xpci3106_8_BOARD_DEVICE_ID 0x301f
179 
181 #define xpci3110_16_BOARD_DEVICE_ID 0x3020
183 #define xpci3110_8_BOARD_DEVICE_ID 0x3021
184 
186 #define xpci3116_16_BOARD_DEVICE_ID 0x3022
188 #define xpci3116_8_BOARD_DEVICE_ID 0x3023
189 
191 #define xpci3500_BOARD_DEVICE_ID 0x3024
192 
194 #define xpci3501_BOARD_DEVICE_ID 0x3001
195 
197 #define xpci3002_16_AUDI_BOARD_DEVICE_ID 0x3029
198 
200 #define xpci3009_BOARD_DEVICE_ID 0x3028
201 
203 #define xpcie3121_16_8_BOARD_DEVICE_ID 0x302E
204 #define xpcie3121_16_4_BOARD_DEVICE_ID 0x302F
205 #define xpcie3121_8_8_BOARD_DEVICE_ID 0x3030
206 #define xpcie3121_8_4_BOARD_DEVICE_ID 0x3031
207 #define xpcie3121_16_8C_BOARD_DEVICE_ID 0x3032
208 #define xpcie3121_16_4C_BOARD_DEVICE_ID 0x3033
209 #define xpcie3121_8_8C_BOARD_DEVICE_ID 0x3034
210 #define xpcie3121_8_4C_BOARD_DEVICE_ID 0x3035
211 
212 #define xpcie3021_16_BOARD_DEVICE_ID 0x3036
213 #define xpcie3021_8_BOARD_DEVICE_ID 0x3037
214 #define xpcie3021_4_BOARD_DEVICE_ID 0x3038
215 
216 #define xpcie3521_8_BOARD_DEVICE_ID 0x3039
217 #define xpcie3521_4_BOARD_DEVICE_ID 0x303A
218 #define xpcie3521_8C_BOARD_DEVICE_ID 0x303B
219 #define xpcie3521_4C_BOARD_DEVICE_ID 0x303C
220 
222 #define xpcie3126_16_8_BOARD_DEVICE_ID 0x3040
223 /*#define xpcie3126_16_4_BOARD_DEVICE_ID 0x3041
224 #define xpcie3126_8_8_BOARD_DEVICE_ID 0x3042
225 #define xpcie3126_8_4_BOARD_DEVICE_ID 0x3043
226 #define xpcie3126_16_8C_BOARD_DEVICE_ID 0x3044
227 #define xpcie3126_16_4C_BOARD_DEVICE_ID 0x3045
228 #define xpcie3126_8_8C_BOARD_DEVICE_ID 0x3046
229 #define xpcie3126_8_4C_BOARD_DEVICE_ID 0x3047*/
230 
231 
232 
233 /* value used for CMD_xpci3xxx_CheckAndGetPCISlotNumber ! DEPRECATED ! */
235 #ifndef CONFIG_xpci3xxx_MAX_BOARD_NBR
236 #define CONFIG_xpci3xxx_MAX_BOARD_NBR (3)
237 #endif // CONFIG_xpci3xxx_MAX_BOARD_NBR
238 
240 #define xpci3xxx_MAX_BOARD_NBR CONFIG_xpci3xxx_MAX_BOARD_NBR
241 
243 #define xpci3xxx_MAGIC (char) 'A'
244 
247 {
248  // FILLME
249  uint8_t b_SlotNumber;
250  uint8_t b_InterruptNbr;
251  uint32_t dw_BoardBaseAddress [5];
252 };
253 
254 #define ADDIDATA_DIFFERENTIAL 1
255 #define ADDIDATA_SINGLE 0
256 
257 #define ADDIDATA_ENABLE 1
258 #define ADDIDATA_DISABLE 0
259 
260 #define ADDIDATA_DIGITAL_INPUT 0
261 #define ADDIDATA_DIGITAL_OUTPUT 1
262 
263 #define ADDIDATA_TIMER 4
264 #define ADDIDATA_WATCHDOG 5
265 #define ADDIDATA_COUNTER 7
266 
267 #define ADDIDATA_ENABLE 1
268 #define ADDIDATA_DISABLE 0
269 
270 #define ADDIDATA_UP 1
271 #define ADDIDATA_DOWN 0
272 
273 #define ADDIDATA_LOW 1
274 #define ADDIDATA_HIGH 2
275 #define ADDIDATA_LOW_HIGH 3
276 
277 #define ADDIDATA_OR 1
278 #define ADDIDATA_AND 2
279 
280 #define ADDIDATA_MAX_TCW 3
281 
282 #define ADDIDATA_MAX_AI 16
283 #define ADDIDATA_1_GAIN 0x0
284 #define ADDIDATA_2_GAIN 0x1
285 #define ADDIDATA_5_GAIN 0x2
286 #define ADDIDATA_10_GAIN 0x3
287 
288 #define ADDIDATA_BIPOLAR 0x0
289 #define ADDIDATA_UNIPOLAR 0x1
290 
291 #define ADDIDATA_NANO_SECOND 0x0
292 #define ADDIDATA_MICRO_SECOND 0x1
293 #define ADDIDATA_MILLI_SECOND 0x2
294 #define ADDIDATA_SECOND 0x3
295 
296 #define ADDIDATA_DELAY_MODE_1 1
297 #define ADDIDATA_DELAY_MODE_2 2
298 #define ADDIDATA_EOC 0x1U
299 
349 #define CMD_xpci3xxx_GetHardwareInformation _IOR(xpci3xxx_MAGIC, 1,long)
350 
388 #define CMD_xpci3xxx_TestInterrupt _IOR(xpci3xxx_MAGIC, 2,long)
389 
410 #define CMD_xpci3xxx_SetTTLPortConfiguration _IOR(xpci3xxx_MAGIC, 3,long)
411 
419 #define CMD_xpci3xxx_ReadEepromHeader_SerialNumber _IOR(xpci3xxx_MAGIC, 4,long)
420 
428 #define CMD_xpci3xxx_GetFirmwareVersion _IOR(xpci3xxx_MAGIC, 5,long)
429 
461 #define CMD_xpci3xxx_InitAnalogInput _IOR(xpci3xxx_MAGIC, 10,long)
462 
463 
484 #define CMD_xpci3xxx_StartAnalogInput _IOR(xpci3xxx_MAGIC, 11,long)
485 
494 #define CMD_xpci3xxx_ReadAnalogInputBit _IOR(xpci3xxx_MAGIC, 12,long)
495 
503 #define CMD_xpci3xxx_ReadAnalogInputValue _IOR(xpci3xxx_MAGIC, 13,long)
504 
507 /* AUTOREFRESH */
577 #define CMD_xpci3xxx_InitAnalogInputAutoRefresh _IOR(xpci3xxx_MAGIC, 14,long)
578 
579 
597 #define CMD_xpci3xxx_StartAnalogInputAutoRefresh _IOR(xpci3xxx_MAGIC, 15,long)
598 
607 #define CMD_xpci3xxx_StopAnalogInputAutoRefresh _IOR(xpci3xxx_MAGIC, 16,long)
608 
620 #define CMD_xpci3xxx_ReadAnalogInputAutoRefreshValueAndCounter _IOR(xpci3xxx_MAGIC, 17,long)
621 
634 #define CMD_xpci3xxx_ReleaseAnalogInputAutoRefresh _IOR(xpci3xxx_MAGIC, 18,long)
637 /* SEQUENCE */
716 #define CMD_xpci3xxx_InitAnalogInputSequence _IOR(xpci3xxx_MAGIC, 20,long)
717 
738 #define CMD_xpci3xxx_StartAnalogInputSequence _IOR(xpci3xxx_MAGIC, 21,long)
739 
750 #define CMD_xpci3xxx_StopAnalogInputSequence _IOR(xpci3xxx_MAGIC, 22,long)
751 
765 #define CMD_xpci3xxx_ReleaseAnalogInputSequence _IOR(xpci3xxx_MAGIC, 23,long)
766 
769 /* ANALOG INPUT HARDWARE TRIGGER */
770 
806 #define CMD_xpci3xxx_EnableDisableAnalogInputHardwareTrigger _IOR(xpci3xxx_MAGIC, 40,long)
807 
820 #define CMD_xpci3xxx_GetAnalogInputHardwareTriggerStatus _IOR(xpci3xxx_MAGIC, 41,long)
821 
822 /* ANALOG INPUT SOFTWARE TRIGGER */
823 
848 #define CMD_xpci3xxx_EnableDisableAnalogInputSoftwareTrigger _IOR(xpci3xxx_MAGIC, 42,long)
849 
858 #define CMD_xpci3xxx_AnalogInputSoftwareTrigger _IOR(xpci3xxx_MAGIC, 43,long)
859 
869 #define CMD_xpci3xxx_GetAnalogInputSoftwareTriggerStatus _IOR(xpci3xxx_MAGIC, 44,long)
870 
889 #define CMD_xpci3xxx_EnableDisableAnalogInputHardwareGate _IOR(xpci3xxx_MAGIC, 45,long)
890 
900 #define CMD_xpci3xxx_GetAnalogInputHardwareGateStatus _IOR(xpci3xxx_MAGIC, 46,long)
901 
904 /* ANALOG OUTPUTS */
923 #define CMD_xpci3xxx_InitAnalogOutput _IOR(xpci3xxx_MAGIC, 50,long)
924 
935 #define CMD_xpci3xxx_ReadAnalogOutputBit _IOR(xpci3xxx_MAGIC, 51,long)
936 
949 #define CMD_xpci3xxx_WriteAnalogOutputValue _IOR(xpci3xxx_MAGIC, 52,long)
950 
953 /* DIGITAL INPUT FILTER */
974 #define CMD_xpci3xxx_Read32DigitalInputs _IOR(xpci3xxx_MAGIC, 60,long)
975 
991 #define CMD_xpci3xxx_InitDigitalInputModuleFilter _IOR(xpci3xxx_MAGIC, 61,long)
992 
995 /* DIGITAL OUTPUTS */
1008 #define CMD_xpci3xxx_SetDigitalOutputMemoryOn _IOR(xpci3xxx_MAGIC, 72,long)
1009 
1020 #define CMD_xpci3xxx_SetDigitalOutputMemoryOff _IOR(xpci3xxx_MAGIC, 73,long)
1021 
1042 #define CMD_xpci3xxx_Set32DigitalOutputsOn _IOR(xpci3xxx_MAGIC, 70,long)
1043 
1066 #define CMD_xpci3xxx_Set32DigitalOutputsOff _IOR(xpci3xxx_MAGIC, 71,long)
1067 
1082 #define CMD_xpci3xxx_Get32DigitalOutputStatus _IOR(xpci3xxx_MAGIC, 74,long)
1083 
1086 /* TIMERS */
1159 #define CMD_xpci3xxx_InitTimer _IOR(xpci3xxx_MAGIC, 80,long)
1160 
1176 #define CMD_xpci3xxx_ReleaseTimer _IOR(xpci3xxx_MAGIC, 81,long)
1177 
1190 #define CMD_xpci3xxx_StartTimer _IOR(xpci3xxx_MAGIC, 82,long)
1191 
1200 #define CMD_xpci3xxx_StartAllTimers _IOR(xpci3xxx_MAGIC, 83,long)
1201 
1214 #define CMD_xpci3xxx_TriggerTimer _IOR(xpci3xxx_MAGIC, 84,long)
1215 
1224 #define CMD_xpci3xxx_TriggerAllTimers _IOR(xpci3xxx_MAGIC, 85,long)
1225 
1238 #define CMD_xpci3xxx_StopTimer _IOR(xpci3xxx_MAGIC, 86,long)
1239 
1240 
1249 #define CMD_xpci3xxx_StopAllTimers _IOR(xpci3xxx_MAGIC, 87,long)
1250 
1251 
1267 #define CMD_xpci3xxx_ReadTimerValue _IOR(xpci3xxx_MAGIC, 88,long)
1268 
1289 #define CMD_xpci3xxx_ReadTimerStatus _IOR(xpci3xxx_MAGIC, 89,long)
1290 
1309 #define CMD_xpci3xxx_EnableDisableTimerInterrupt _IOR(xpci3xxx_MAGIC, 90,long)
1310 
1331 #define CMD_xpci3xxx_EnableDisableTimerHardwareOutput _IOR(xpci3xxx_MAGIC, 91,long)
1332 
1348 #define CMD_xpci3xxx_GetTimerHardwareOutputStatus _IOR(xpci3xxx_MAGIC, 92,long)
1349 
1352 /* COUNTERS */
1377 #define CMD_xpci3xxx_InitCounter _IOR(xpci3xxx_MAGIC, 100,long)
1378 
1379 
1380 
1395 #define CMD_xpci3xxx_ReleaseCounter _IOR(xpci3xxx_MAGIC, 101,long)
1396 
1408 #define CMD_xpci3xxx_StartCounter _IOR(xpci3xxx_MAGIC, 102,long)
1409 
1417 #define CMD_xpci3xxx_StartAllCounters _IOR(xpci3xxx_MAGIC, 103,long)
1418 
1419 
1431 #define CMD_xpci3xxx_TriggerCounter _IOR(xpci3xxx_MAGIC, 104,long)
1432 
1440 #define CMD_xpci3xxx_TriggerAllCounters _IOR(xpci3xxx_MAGIC, 105,long)
1441 
1453 #define CMD_xpci3xxx_StopCounter _IOR(xpci3xxx_MAGIC, 106,long)
1454 
1462 #define CMD_xpci3xxx_StopAllCounters _IOR(xpci3xxx_MAGIC, 107,long)
1463 
1476 #define CMD_xpci3xxx_ClearCounter _IOR(xpci3xxx_MAGIC, 108,long)
1477 
1492 #define CMD_xpci3xxx_ReadCounterValue _IOR(xpci3xxx_MAGIC, 109,long)
1493 
1494 
1512 #define CMD_xpci3xxx_ReadCounterStatus _IOR(xpci3xxx_MAGIC, 110,long)
1513 
1530 #define CMD_xpci3xxx_EnableDisableCounterInterrupt _IOR(xpci3xxx_MAGIC, 111,long)
1531 
1551 #define CMD_xpci3xxx_EnableDisableCounterHardwareOutput _IOR(xpci3xxx_MAGIC, 112,long)
1552 
1567 #define CMD_xpci3xxx_GetCounterHardwareOutputStatus _IOR(xpci3xxx_MAGIC, 113,long)
1568 
1570 /* WATCHDOG */
1590 #define CMD_xpci3xxx_InitWatchdog _IOR(xpci3xxx_MAGIC, 120,long)
1591 
1603 #define CMD_xpci3xxx_ReleaseWatchdog _IOR(xpci3xxx_MAGIC, 121,long)
1604 
1616 #define CMD_xpci3xxx_StartWatchdog _IOR(xpci3xxx_MAGIC, 122,long)
1617 
1618 
1626 #define CMD_xpci3xxx_StartAllWatchdogs _IOR(xpci3xxx_MAGIC, 123,long)
1627 
1639 #define CMD_xpci3xxx_TriggerWatchdog _IOR(xpci3xxx_MAGIC, 124,long)
1640 
1648 #define CMD_xpci3xxx_TriggerAllWatchdogs _IOR(xpci3xxx_MAGIC, 125,long)
1649 
1650 
1662 #define CMD_xpci3xxx_StopWatchdog _IOR(xpci3xxx_MAGIC, 126,long)
1663 
1671 #define CMD_xpci3xxx_StopAllWatchdogs _IOR(xpci3xxx_MAGIC, 127,long)
1672 
1689 #define CMD_xpci3xxx_ReadWatchdogStatus _IOR(xpci3xxx_MAGIC, 128,long)
1690 
1705 #define CMD_xpci3xxx_ReadWatchdogValue _IOR(xpci3xxx_MAGIC, 129,long)
1706 
1724 #define CMD_xpci3xxx_EnableDisableWatchdogInterrupt _IOR(xpci3xxx_MAGIC, 130,long)
1725 
1744 #define CMD_xpci3xxx_EnableDisableWatchdogHardwareOutput _IOR(xpci3xxx_MAGIC, 131,long)
1745 
1760 #define CMD_xpci3xxx_GetWatchdogHardwareOutputStatus _IOR(xpci3xxx_MAGIC, 132,long)
1761 
1767 #define __xpci3xxx_UPPER_IOCTL_CMD 132
1768 
1769 
1773 #define ANALOG_SEQUENCE_START_BITMASK 0x0000000F
1775 #define ANALOG_SEQUENCE_STOP_BITMASK 0x00000F00
1776 
1777 #define ADDIDATA_TRIGGER_START_A_SINGLE_CONVERSION 0
1778 #define ADDIDATA_ONE_SHOT_TRIGGER 1
1779 #define ADDIDATA_TRIGGER_START_A_SEQUENCE_SERIES 2
1780 #define ADDIDATA_TRIGGER_START_A_SINGLE_SEQUENCE 3
1781 #define ADDIDATA_TRIGGER_START_A_SCAN_SERIES 6
1782 #define ADDIDATA_TRIGGER_START_A_SINGLE_SCAN 7
1783 #define ADDIDATA_TRIGGER_START_A_AUTO_REFRESH_SERIES 10
1784 #define ADDIDATA_TRIGGER_START_A_SINGLE_AUTO_REFRESH 11
1785 
1786 #define ADDIDATA_MAX_INTERRUPT_ANALOG_INPUT_VALUE 100
1787 
1791 #define ADDIDATA_MAX_EVENT_COUNTER 256
1792 
1793 #endif // __xpci3xxx_H__
uint8_t b_InterruptNbr
Board interrupt number.
Definition: xpci3xxx.h:250
uint8_t b_SlotNumber
PCI slot number.
Definition: xpci3xxx.h:249
uint32_t dw_BoardBaseAddress[5]
array of BAR base address (in kernel virtual space)
Definition: xpci3xxx.h:251